1. Field of the Invention
This invention is related to the field of coherent memory systems.
2. Description of the Related Art
Chip multithreading (CMT) has been proposed as one way to utilize the transistors that can now be integrated on the same semiconductor substrate, or integrated circuit chip. Particularly, one or more processor cores may be included on a chip, and each processor core is multithreaded. That is, the processor core includes hardware to have multiple threads active. Software can activate the threads for execution, and the hardware handles executing the threads, interleaving access among the instructions from different threads to shared processor core hardware, etc.
CMTs execute multiple threads/processes concurrently. Each process generally has a different virtual memory space (although some related processes may share a virtual memory space or may share certain underlying physical pages). Thus, the multiple threads concurrently active in a CMT and may generate numerous memory accesses to many different addresses. The bandwidth needed to provide for the memory accesses, and to maintain coherency, would exceed the available bandwidth and the latency would reduce performance on typical interconnects used for standard single-threaded processors such as multidrop busses, point to point interfaces such as HyperTransport™, etc.